About

I am a digital design engineer working across FPGA and ASIC development. I hold an M.Sc. in Computer Science and a B.Sc. in Electrical and Electronics Engineering from Özyeğin University, where I graduated top of my department.

I enjoy building things that sit close to the hardware. My work has included RTL design for DCO-OFDM, FPGA-based communication and signal-processing systems, and hands-on debugging on real boards. I also spend a lot of time on verification and implementation, including writing testbenches, running static timing analysis, and using Python to automate repetitive parts of the design and validation flow.

I have worked as a researcher and engineer at CDNC at Karlsruhe Institute of Technology (KIT) and at nEMESysLab at Özyeğin University. Along the way, I have also supported teaching in areas like Computer Architecture and FPGA Design.