I’m a digital design engineer working across FPGA and ASIC development. I hold an M.Sc. in Computer Science and a B.Sc. in Electrical and Electronics Engineering from Özyeğin University, where I graduated top of my department. My work includes RTL design for DCO-OFDM, FPGA communication and DSP systems, verification and STA, plus Python automation for design flows. I’ve worked at CDNC at Karlsruhe Institute of Technology (KIT) and at nEMESysLab at Özyeğin University.

You can contact me through my e-mail in the footer below, and check out my profiles on various platforms.